Scalability assessment of Group-IV mono-chalcogenide based tunnel FET

Ambipolar Effect Free Double Gate PN Diode Based Tunnel FET

Analysis of GAA Tunnel FET using MATLAB

In order to improve the energy efficiency of next generation digital systems, transistors withSubthreshold SlopeReferences Q. Zhang, W. Zhao, and A. Seabaugh, "Low-subthreshold-swing tunnel

Tunnel FET technology: A reliability perspective

Tunneling-field-effect-transistor (TFET) has emerged as an alternative for conventional CMOS by enabling the supply voltage (VDD) scaling in ultra-low power, energy efficient computing, due to its sub-60 mV/ decade sub-threshold slope (SS). Given its unique device characteristics such as the asymmetrical source/drain design induced uni-directional conduction, enhanced on-state Miller capacitanc...

Characterization of Tunnel Fet for Ultra Low Power Analog Applications

In modern portable devices, the supply voltage is decreased to reduce the power dissipation. However as the supply voltage is scaled down below 0.4V, the normal MOSFET devices cannot be used due to lower ION/ IOFF ratio which will reduce the static power dissipation. Hence for low power applications, Tunnel FET is used as alternatives due to their higher sub threshold swing, extremely low off s...

Investigation of a Novel P+n+in+ Tunnel Fet

Tunnel FETs are interesting devices for their steep sub-threshold slopes. In this paper a p+n+in+ tunnel FET is proposed and optimized for a high Ion/Ioff ratio and suitable output characteristics. The proposed tunnel FET has p+in+ structure with a δ-doped n+ region at the beginning of the channel. The proposed structure is extensively studied and the energy bands, transfer characteristics, and...